Company : Synopsys (India) Pvt. Ltd.
Website : www.synopsys.com
Job Role : Intern – Technical
Eligibility : BE/BTech/ME/MTech
Experience : Freshers
Job Location : Hyderabad
Synopsys, Inc. (Nasdaq:SNPS) provides products and services that accelerate innovation in the global electronics market. As a leader in electronic design automation (EDA) and semiconductor intellectual property (IP), Synopsys’ comprehensive, integrated portfolio of system-level, IP, implementation, verification, manufacturing, optical and field-programmable gate array (FPGA) solutions help address the key challenges designers face such as power and yield management, system-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in quickly bringing the best products to market while reducing costs and schedule risk. For more than 25 years, Synopsys has been at the heart of accelerating electronics innovation with engineers around the world having used Synopsys technology to successfully design and create billions of chips and systems. The company is headquartered in Mountain View, California, and has approximately 90 offices located throughout North America, Europe, Japan, Asia and India.
Responsible for layout designing and verification of embedded memory compilers.
Learn and apply skills in memory compilers having Transistor level layout Design on latest and active technologies.
Resolves a wide range of issues in creative ways.
Work under supervision. Have working knowledge of basic design tools. Maintain accurate and thorough documentation of work. Be a positive participant and active team member.
Provides regular updates to manager on project status.
Frequently networks with senior internal and external personnel in own area of expertise.
Strong CMOS fundamentals.
Basic knowlage of CMOS layouts.
Knowledge of CMOS fabrication.
Good digital design knowledge.
Exposure to basic analog fundamentals.
Working tcl/ perl scripting know how.
Basic know how of SRAM, ROM circuits.
Sign-off quality tools in assigned design phase.
Have basic knowledge of design principles and practices of tools.
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